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Computer Architecture

A complete path from functional units and register-transfer design through instruction sets, arithmetic, control, memory, pipelines, I/O, DMA, and multiprocessor systems.


This course follows a stored program from representation to execution. It begins with the computer’s functional units, builds registers, buses, microoperations, and the ALU, then develops instruction encoding, arithmetic algorithms, and hardwired control. The later chapters connect that processor to cache and virtual memory, overlap work with pipelines and vector hardware, move data through interrupts and DMA, and finally scale the design across multiprocessors and clusters. Book-faithful circuit topology is paired with consistent themed visuals and worked numeric examples throughout.

Outcomes

  • Trace instructions from binary encoding through register transfers and hardwired control
  • Design and analyze arithmetic, register, bus, ALU, memory, and I/O datapaths
  • Calculate opcode capacity, effective addresses, arithmetic results, cache timing, and pipeline speedup
  • Compare cache mappings, virtual-memory policies, I/O transfer modes, and DMA operation
  • Evaluate pipeline, vector, array, shared-memory, distributed-memory, and cluster organizations

Outline

Start →
  1. 01
    Computer OrganizationDistinguish architecture from organization, identify the functional units of a stored-program computer, and trace instructions through fetch, decode, and execution.
  2. 02
    Digital ComponentsBuild architectural storage and selection structures from integrated circuits, decoders, encoders, multiplexers, registers, shift registers, counters, and memory arrays.
  3. 03
    Datapath and MicrooperationsDescribe clocked data movement with register-transfer notation and build buses, arithmetic circuits, logic circuits, shifters, and an arithmetic logic shift unit.
  4. 04
    Instruction Set DesignEncode operations and operands, compare zero- through three-address formats, calculate expanding opcodes and Huffman codes, resolve addressing modes, and trace program control.
  5. 05
    Computer ArithmeticBuild signed adders, sequential and array multipliers, Booth recoding, and restoring and non-restoring dividers from registers and microoperations.
  6. 06
    Control Unit DesignDesign hardwired CPU control as a finite-state machine: specify the datapath, derive microoperations and control signals, and implement one-hot, encoded, PLA, or ROM controllers.
  7. 07
    Memory HierarchyOrganize RAM and ROM, map cache lines, calculate effective access time, translate virtual addresses, and compare replacement and write policies.
  8. 08
    Pipelining and ParallelismQuantify pipeline speedup, resolve instruction hazards, and compare scalar, superscalar, vector, attached-array, and SIMD organizations.
  9. 09
    Input Output SystemsConnect asynchronous peripherals through interfaces, compare programmed and interrupt-driven transfer, arbitrate priority, and trace DMA and IOP operation.
  10. 10
    Multiprocessor SystemsCompare shared and distributed memory, buses, multiport and crossbar systems, multistage and hypercube networks, arbitration, synchronization, coherence, and clusters.